DEVCC – FORM FACTOR

Introducing the DEVCC – Form Factor

The DEVCC Form Factor is the ZarDynamix (C) standard layout for PIC 16F and 18F devices. PICs within these families have a high degree of forwards and backwards compatibility. How this helps an embedded developer is that it enables them to start designing a system or product using one device and then migrate that code through larger PIN counts and program memory sizes with the few necessary changes to their working and tested code. The DEVCC platform takes advantage of this by providing an interchangeable set of bases that revolve around a set pin layout.

The PIC16F and PIC18F Families have PORT PIN clusters in common and these port pin clusters enable the shields to be switched between different bases. This means that if you started with a 20 PIN PIC device, you can move to an 18 PIN device, then change to a 28 PIN device using the same shield as your project evolves.

The DEVCC platform is roughly the same sizeĀ as a standard credit card and includes 3mm mounting points. The PCB can therefore be easily inserted into an enclosure and used in real life scenario projects and applications. The compact size of the PCB means that it is economical on the budget and simple and easy to use.

The close up articles look at how the form factor has been leveraged, please see them for further details.

Displayed in the line art below, the DEVCC form factor offers

  • 2.1 MM DC JACK
  • LDO 3v3 and 5v0 voltage selection via jumper
  • Reset button to easily regain control of a rogue code test
  • Power on LED
  • 4 x 10 WAY SIL headers, with all available pins for the device PIN count tracked
  • ICSP Interface for PICKIT Devices
    • The DEVCC V20 includes a header for the MIkroe MIKROPROG programmer
  • USB connector with MCP2200 USB UART
  • DEVCC can be USB powered
    • USB Power selection with in rush current inductor

DEVCC - V40_1 FF

The above form factor is open to update and change and as the DEVCC boards are produced new features will be added to enhance the design and the design’s performance.
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